1. Field of the Invention
This invention relates to a semiconductor device and more particularly to a planar transferred electron logic device (TELD) having improved biasing means for enhancing the device sensitivity and stability.
2. Description of the Prior Art
Planar transferred electron logic devices, also referred to as Gunn devices, offer switching speeds on the order of 20 to 50 pico-seconds with delay -- dissipation products of 1 to 2 pico-joules. Such speeds are not practicable with CMOS (Complementary MOS) or ECL (Emitter Coupled Logic) devices. Such planar transferred electron devices are particularly useful for performing gigabit rate signal processing and Fast Fourier Transforms (FFT).
Planar transferred electron devices typically comprise a body of semiconductor material such as gallium arsenide which exhibits the "transferred electron effect", an effect well known and exhibited in Gunn devices, and the like. For further details on the transferred electron effect, see U.S. Pat. No. 3,991,328 issued Nov. 9, 1976 and U.S. Pat. No. 3,700,014 issued Dec. 12, 1972. This material has a length, thickness and doping density such that the body is characterized by a transfer of electrons from a high to a low mobility sub-band and the formation of domains in the presence of a suitable biasing potential above threshold. Such devices usually have a product of length (L) times the doping density (n) or nL product greater than 1 .times. 10.sup.13 cm.sup.-2 and a doping density times thickness that is greater than 1 .times. 10.sup.12 cm.sup.-2. A cathode terminal is located on the top surface of the body near one end and a anode terminal is located on the top surface of the body near the end opposite the cathode end.
In the prior art devices, the biasing potential across the cathode and anode terminal is determined in the quiescent state at a value slightly below that of threshold. A typical device is operated from 0.9 to 0.95 times threshold. A gate electrode is located close to the cathode. When input signals applied to the gate electrode are of sufficient magnitude to increase the value of the electric field under the gate to a value above that of threshold, domains are formed and the device changes state from a relatively high current state to a low current state.
It is often desirable to cascade transferred electron logic devices in logic circuits to meet various circuit requirements. If the output of the logic device is of the same polarity as the input to which it is connected, these devices can be cascaded without additional invertors after each stage. To achieve an output polarity the same as that of the input, a load resistor connected to the cathode terminal is required. However, the utilization of such a load resistor connected to the cathode terminal disadvantageously degrades the trigger sensitivity and stability of the device since the load resistor creates a larger reverse bias on the gate terminal than without the load resistor.